Serial Communication
The sequential transmission of bits, one at a time, via some shared medium
VS Parallel
- Pros
- Fewer wires
- Works with smaller devices with lower pin counts and power consumption
- Not as affected by noise (and does not have crosstalk)
- Cons
- Typically slower
Directions
- Full Duplex: Transmit and receive data simultaneously
- Half Duplex: Can only transmit or receive at a given time
- Simplex: Only ever one way
Used For
- Microcontrollers interfacing with each other
- Microcontrollers interfacing with a PC serial port (like for debugging)
- Sensors
- External memory devices
- LCDs
- Wireless communication
Asynchronous
- Use a common data rate that is shared between two entities
- Called the baud rate (commonly written in bits per second)
- Start and stop signals are used to indicate the beginning or end of a transmission
Universal Async Receiver/Transmitter (UART)
- Universal serial components that can be used to implement some different protocols
- Typically use non-negative DC voltages (logical 1 is non-zero)
- Don’t have as many strict guidelines and are easier to setup
- Can be full or half duplex (typically full)
- Transmission
- Start bit
- Transition from idle (high) to low
- Used by receiver to begin synchronization
- Data Bits
- Eight data bits is typical
- Typically LSB is first
- Parity Bits
- Optional
- Can be even or odd parity (for even the total number of 1s should always be even and visa versa)
- Stop
- Return to idle state (high)
- Only use more than 1 stop bit if there are a lot of calculations that need to happen between frames and you don’t want to manually idle
- Start bit
- Time to transmit
- Error Types
- Timing
- Underflow (samples too fast)
- Overflow (samples too slow)
- Framing
- The first stop bit was 0
- Overrun
- Does not get a stop bit
- Timing
Universal Serial Bus (USB)
- Serial bus standard
- Four signals
- V (4.75-5.25V)
- D-
- D+
- GND
- Transmitted on a twister pair of data cables, labeled D+ and D-
- Collectively use half-duplex differential signaling to combat the effects of electromagnetic noise on longer lines
- Usually operate together (they are not separate simplex connections)
Synchronous
- Use a dedicated signal for synchronization that is shared between two entities and controls the rate at which data is transmitted
- That signal is often called a clock signal
- Flip flops are used to store the data that was sent when the clock signal changed
Serial Peripheral Interface (SPI)
- Typically utilized by components such as sensors, memory, etc.
- Generally chosen for applications where short-distance, full-duplex is required
- Description
- Single “master” device can communicate with at least one “slave” device
- Only the master device can initiate some transfer of data
- The master device can only communicate with a single slave device at any given time
- In some unique cases it can transmit to multiple
- Only one master device on a bus
- I2C does not have this limitation but is slower because of it
- Signals
- Chip select (CS)
- Indicates when an individual slave device should be enabled (accepting data)
- Unique chip select signal required for every device on the bus (a decoder can be used to squeeze more out of the available master pins)
- Active low
- If there is only one slave, it can sometimes be tied to ground (depends on if the slave requires a falling edge or just low)
- Master-out slave-in (MOSI)
- Data that is sent from the master to slave device
- Master-in Slave-out (MISO)
- Data that is sent from the slave device to the master device
- Only input to the master device
- Serial Clock (SCK)
- Generated by the master device to control when each bit is to be received by the slave device
- Polarity - Idle voltage level
- Phase - Which edge is used to sample each bit of data
- Chip select (CS)
- As each bit gets shifted out of the master device, a bit form the slave device is shifted in
Inter-Integrated Circuit (I2C)
- Comprised of two signals
- Serial Data (SDA) - Bidirectional signal for data to propagate
- Serial Clock (SCL) - Dictates when data is valid and can be read by the receiving device
- Multiple master and slaves can share the same bus
- Each slave device has a slave address associated with it which is what allows the bus to be shared
Universal Synchronous and Asynchronous Receiver/Transmitter (USART)
- The XMEGA has 8
- Two pins Rx (receive) and Tx (transmit)
- Setup
- Set TxD pin value high (PORTx_OUT) to prevent false starts
- Set TxD pin as output (PORTx_DIR)
- Set the baud rate (BAUDCTRLA/B)
- Set the frame format and mode of operation (CTRLC)
- Enable the transmitter and/or the receiver, depending on the usage (CTRLB)
- Optional: setup UART interrupts (CTRLA)