Exceptions and Interrupts

• Exception: Arises within the CPU
  • undefined opcode, overflow, syscall…
• Interrupt: From an external I/O controller
• Dealing with them without sacrificing performance is hard
• Handling Exceptions
  • Save PC of offending (or interrupted) instruction
    • In LEGv8: Exception Link Register (ELR)
  • Save indications of the problem
    • In LEGv8: Exception Syndrome Register (ESR)
• Handler Actions
  1. Read cause, and transfer to relevant handler
  2. Determine action required
  3. If Restartable
     1. Take corrective action
     2. use EPC to return to program
  4. Else
     1. Terminate program
     2. Report cause from ESR
• Exceptions in a pipeline
  • Another form of control hazard
  • Pipeline flushes the instruction
    • In the same way that it is when a branch is predicted wrong
• Multiple Exceptions
  • Pipelining overlaps multiple instructions → could have multiple exceptions at once
  • Simple approach: deal with exception from the earliest instruction
  • In complex pipelines
    • Multiple instructions issued per cycle
    • Out-of-order completion
    • → Maintaining precise exceptions is difficult!